A Case for Speculative Strength Reduction

Most high performance general purpose processors leverage register renaming to implement optimizations such as move elimination or zero-idiom elimination. Those can be seen forms of strength reduction whereby a faster but semantically equivalent operation is substituted slower operation. In this letter, we argue that other reductions performed dynamically if input values instructions are known in time, i.e., prior renaming. We study the potential for leveraging Value Prediction achieve goal and show SPEC2k17, an average 3.3 percent (up 6.8 percent) dynamic could reduced. Our experiments suggest state-of-the-art value predictor allows capture 59.7 on 99.6 percent).